1. Field of the Invention
The current invention relates to integrated circuits (ICs), and in particular, to ICs having multiple features wherein the IC is designed so that one or more features may be disabled.
2. Description of the Related Art
Manufacturers of ICs sometimes offer a set of products that perform substantially similar functions but that differ in the particular features available. Products with greater quantity or quality of features typically cost more than similar products from the same IC manufacturer that offer lesser quantity or quality of features. Providing varying levels of features and prices for a set of similar products allows an IC manufacturer to meet the particular price and performance needs of a wide range of customers.
One approach to providing such a range of similar yet feature-varied IC products is to design a separate IC for each product. However, due the revenue and cost requirements of custom-designing and custom-generating an entire IC, that solution is typically not practical for such feature-varied product sets since the limited number of customers at each price and performance point is not likely to be sufficient to justify the corresponding design and production costs of a customized IC.
Another approach to providing such a range of similar yet feature-varied IC products is to design a single multi-featured IC, wherein one or more features can be disabled by the manufacturer. This allows the manufacturer to design and produce a single type of IC, and then, at some later stage of production, differentiate the various models by turning off one or more features on one or more groups of manufactured ICs. Several ways to turn off features on a multi-featured IC are described in U.S. Pat. No. 5,646,451, issued Jul. 8, 1997 to Freyman et al., and incorporated herein by reference.
For example, a single IC mask set is designed and manufactured which incorporates all the features of the multi-featured IC. Particular features may then be disabled or enabled during the chip-packaging process by choosing a particular way of connecting pads on the IC to each other and/or to package-external pins. For example, a particular feature may be enabled by connecting a particular pad to a package-external pin that, in operation, will connect to a power source, and that feature may be disabled by connecting that particular pad to a package-external pin that, in operation, will connect to ground voltage. However, this method of feature selection may (i) require increasing the complexity and cost of the packaging process, (ii) require the design and maintenance of multiple package-wire bonding diagrams, (iii) require closer coordination with the chip-packager, which is typically a third-party entity, (iv) allow for easier reverse-engineering of the feature-selection methodology, and (v) result in surpluses of chips having one or more feature sets, since chips are generally packaged in batches and the particular wiring configuration, and consequently the feature selection, for all chips in a batch is the same.